ARM Instruction Set: Multiple Register Load and Store Instructions

Assembler input:

LDM|STM(D|I B|A)|(E|F A|D) <register>[!],{<registers>}[^]

Assembler output:

High byte as standard
Bit 23 is increment flag (1 for increment)
Bit 22 is ^ flag
Bit 21 is ! flag
Bit 20 is load/store flag (1 for load)
Fifth nybble is address register
Bottom four nybbles determine which registers are loaded/stored
    Bit  Register
    0	 R0 loaded/stored when set
    :    :
    15	 R15 loaded/stored when set